Problemas de electrónica básica (130 problemas con soluciones)

En este texto se presenta una colección de problemas con soluciones sobre diferentes temas de Electrónica Básica. Gran parte de estos problemas han sido propuestos en exámenes de asignaturas de iniciación a la Electrónica en diferentes titulaciones de la Universidad de Granada. El objetivo de este texto es ayudar a los estudiantes a auto-evaluarse. En este sentido, en algunos problemas solo se da una sugerencia y la solución numérica, sin detallar el cálculo. Si a pesar de tal sugerencia, el estudiante no consigue resolver el problema el consejo de los autores es que repase los conocimientos teóricos de la materia a la que corresponde el problema. De todas formas, el texto se ha compuesto para ser estudiado secuencialmente, de manera que la dificultad que pueda encontrar el estudiante en un problema concreto puede ya haber sido tratada con más detalle en un problema anterior. Se han incluido al principio del texto unos apartados dedicados a Teoría de Circuitos. Los problemas de esta parte, también propuestos en exámenes, tienen como objeto preparar al estudiante para abordar los circuitos eléctricos equivalentes que se obtendrán cuando se sustituyan los dispositivos electrónicos por sus modelos de circuito. A veces, como resultado de tales sustituciones, pueden quedar elementos superfluos (elementos pasivos en paralelo con una fuente de tensión, o en serie con una fuente de corriente, por poner ejemplos). Por esta razón, se ha insistido en circuitos con tal peculiaridad, ya que la experiencia docente nos ha demostrado que suelen resultar particularmente confusos para los alumnos. Para adquirir un mayor conocimiento teórico sobre este tipo de problemas se puede consultar el libro de Teoría de Circuitos: ''Fundamentos de Teoría de Circuitos para Electrónica'', Juan A. López Villanueva, Juan A. Jiménez Tejada, 2008. http://hdl.handle.net/10481/14700.This book contains a collection of problems with solutions related to basic aspects of Electronics. Many of these problems have been proposed in exams of different courses on Fundamentals of Electronics at the Universidad de Granada, Spain. The objective of this book is to help students to evaluate themselves. In that sense, only minor suggestions and the solution are given in some problems, and no detailed mathematical development appears. Nevertheless, if such suggestions are scarce in order to get to the final solution, authors advise students to study once more the theoretical contents related to the problem. The text has been written in order to be studied in a sequential way. This means that a difficulty found by a student in a particular problem may have been solved in a previous one. At the beginning of the book, there are some chapters devoted to Circuit Theory. Their problems, proposed in exams as well, aim to prepare the student for the many equivalent electrical circuits that appear in any electronic circuit. As a result of the transformation of an electronic device into its electrical model, some elements can be considered superfluous (passive elements in parallel with a voltage source, or in series with a current source). The text insists on circuits with such features because experience shows that they are difficult to understand. Another reference related Circuit Theory can be found in a book by the same authors: ''Fundamentos de Teoría de Circuitos para Electrónica'', Juan A. López Villanueva, Juan A. Jiménez Tejada, 2008. http://hdl.handle.net/10481/14700Universidad de Granada. Departamento de electrónica y tecnología de computadore

Fundamentos de teoría de circuitos para electrónica

Este libro se ha escrito para facilitar el estudio de asignaturas de Electrónica de carácter básico o general. No debe contemplarse como una teoría de circuitos para ser estudiada de forma secuencial o independiente, sino como un apéndice al conjunto de los temas que tratan el temario de Electrónica propiamente dicho. Nuestra idea es que este libro sea consultado en el momento en que su estudio sea indispensable para la marcha de una asignatura de Electrónica Básica o General. En consecuencia, la elección del contenido de este libro se ha hecho de forma que se adapte a un temario de asignaturas de estas características. En concreto, se ha dividido en dos partes, de manera que con solo estudiar la primera se tengan las herramientas de teoría de circuitos necesarias para abordar con éxito el estudio de dispositivos electrónicos, los problemas de polarización de dispositivos en circuitos externos y el análisis de las configuraciones elementales utilizadas en los circuitos lógicos. En la primera parte se han incluido definiciones básicas, teoremas y métodos fundamentales para el análisis de redes, la teoría de circuitos en corriente continua, algunos ejemplos de análisis de circuitos en los que aparecen elementos no lineales y ejemplos simples de respuestas transitorias que permitan estimar después los retardos producidos cuando un circuito lógico realice una transición entre dos estados estáticos diferentes. En la segunda parte se incluirá la parte de teoría de circuitos cuyo conocimiento es previo al estudio de los temas de Electrónica Analógica. Se verán conceptos y herramientas fundamentales para el análisis de circuitos cuando las señales o excitaciones externas son variables en el tiempo.This book has been written to help novel students on Electronics to understand new concepts in Circuits. This is a reference book related to Circuit Theory to be studied in parallel to studies in Electronics. In consequence, the contents of the book have been adapted to the contents of a course on “Fundamentals of Electronics”. The book is divided in two parts. In the first one, the basic tools employed in electronic circuits are provided. They will help to understand new concept associated to electronic devices, biasing issues, electronic devices in circuits and the analysis of the basic configurations employed in logic circuits. The first part includes definitions, theorems and fundamental methods to analyze circuit networks, theory on direct current (dc) circuits, some examples where circuits containing non linear devices are analyzed and some easy examples of transient recovery analysis. The second part is devoted to circuits related to Analog Electronics. Fundamental concepts and tools related to alternating current (ac) are provided in this part.Departamento de electrónica y tecnología de computadore

Low-frequency noise in downscaled silicon transistors: Trends, theory and practice

By the continuing downscaling of sub-micron transistors in the range of few to one deca-nanometers, we focus on the increasing relative level of the low-frequency noise in these devices. Large amount of published data and models are reviewed and summarized, in order to capture the state-of-the-art, and to observe that the 1/area scaling of low-frequency noise holds even for carbon nanotube devices, but the noise becomes too large in order to have fully deterministic devices with area less than 10nm×10nm. The low-frequency noise models are discussed from the point of view that the noise can be both intrinsic and coupled to the charge transport in the devices, which provided a coherent picture, and more interestingly, showed that the models converge each to other, despite the many issues that one can find for the physical origin of each model. Several derivations are made to explain crossovers in noise spectra, variable random telegraph amplitudes, duality between energy and distance of charge traps, behaviors and trends for figures of merit by device downscaling, practical constraints for micropower amplifiers and dependence of phase noise on the harmonics in the oscillation signal, uncertainty and techniques of averaging by noise characterization. We have also shown how the unavoidable statistical variations by fabrication is embedded in the devices as a spatial “frozen noise”, which also follows 1/area scaling law and limits the production yield, from one side, and from other side, the “frozen noise” contributes generically to temporal 1/f noise by randomly probing the embedded variations during device operation, owing to the purely statistical accumulation of variance that follows from cause-consequence principle, and irrespectively of the actual physical process. The accumulation of variance is known as statistics of “innovation variance”, which explains the nearly log-normal distributions in the values for low-frequency noise parameters gathered from different devices, bias and other conditions, thus, the origin of geometric averaging in low-frequency noise characterizations. At present, the many models generally coincide each with other, and what makes the difference, are the values, which, however, scatter prominently in nanodevices. Perhaps, one should make some changes in the approach to the low-frequency noise in electronic devices, to emphasize the “statistics behind the numbers”, because the general physical assumptions in each model always fail at some point by the device downscaling, but irrespectively of that, the statistics works, since the low-frequency noise scales consistently with the 1/area law

Variable-range hopping charge transport in organic thin-film transistors

Please cite this article as: O. Marinov, M. J. Deen, J. A. Jiménez-Tejada, C. H. Chen, Variable-range hopping charge transport in organic thin-film transistors, Physics Reports, (2020), 844, 1-105The charge transport in organic thin-film transistors (OTFTs) is assessed in terms of variable range hopping (VRH), by numerical simulations, analytical analyses and comparisons to published experimental results. A numerical simulator, built on the fundamental relations for VRH, provides a simple key dependence that the sum of hopping energy and energy bending under bias is equal to the hopping energy in the bulk material, the latter a bias-independent function of the absolute temperature. This relation binds electrostatics and VRH in OTFTs, at various assumptions for density of states (exponential, double-exponential and normal distributions). It generates and confirms many analytical expressions accumulated over the years for mobility, conductance, potential profiles in the depth of the organic semiconducting film and their relation to bias, film-thickness, also explaining the performance of OTFTs at elevated temperatures. The relations between charges, mobility and bias in OTFTs adhere from the above key dependence. We provide a method to obtain the distribution of the hopping time, which establishes explanations to non-stationary effects in OTFTs, such as dispersive transport, non-reciprocal transitions between on and off-states of the OTFT (usually attributed to gate bias stress and charge build-up), and low-frequency noise in the OTFT channel current.The authors gratefully acknowledge support from the Canada Research Chair (CRC) program and the Natural Sciences and Engineering Research Council (NSERC) of Canada

Analysis of the Influence of Selective Contact Heterojunctions on the Performance of Perovskite Solar Cells

Knowledge of the mechanisms that take place at the selective contacts, located at the charge-transport-layer (CTL)/perovskite heterojunctions, is crucial for the optimization of perovskite solar cells. Anomalous high values of the low-frequency capacitance at open-circuit and short-circuit indicate a high accumulation of charge at the interfaces, which could hinder the extraction of charge and increase hysteresis in current-voltage curve. To investigate this issue, we develop a simulation model based on the drift diffusion differential equations with specific boundary conditions at the interfaces. We have simulated the CTL/perovskite structures as part of the entire perovskite solar cell, in order to establish the realistic energy profile across the interface. The energy profile allows to detect in which situations free charge accumulation at the interfaces exists, and to quantify this accumulation as a function of the device and material parameters. We discuss the role and the importance of each CTL/perovskite interface at open-circuit and short-circuit. We conclude that the accumulation of charge at the interfaces is strongly affected by the specific contact materials, and critically depends on a compromise between the presence of ions, the values of the carrier mobility, and the interfacial and bulk recombination parameters

Unified electrical model for the contact regions of staggered Thin Film Transistors

In this work, we propose an unified compact model, which includes the effects of both source and drain contact regions, to describe the electrical characteristics of staggered thin film transistors (TFTs). The model is based on a generic drift analytical expression that describes the intrinsic channel of the transistor. Despite the distributed two-dimensional nature of the contacts in staggered configurations, two-terminal components are usually preferred to model the source and drain contact regions. In this regard, a model based on versatile simple expressions that describe the current-voltage relations of both contact regions are proposed in this work. These expressions are based on the physics underlying a metal-organic-metal structure. They can be adapted to different transport conditions, such as ohmic, space-charge-limited transport or Schottky-like contacts. This adaptation is controlled with the value of a single parameter that modifies the concavity or convexity of these expressions. The model works together with an evolutionary parameter extraction procedure, presented in a previous work for TFTs with negligible drain contact effects, and adapted here to this proposed model for staggered transistors. The results of the model and the evolutionary procedure have been validated with published experimental data of different TFTs, mostly organic thin film transistors (OTFTs). The model and evolutionary procedure agrees with other procedures tested successfully in the literature which were defined to cope with specific kinds of contacts in the TFTs. In this regard, our model and evolutionary parameter extraction procedure unify these previous procedures.Departamento de Electrónica y Tecnología de Computadore

Versatile model for the contact region of organic thin-film transistors

Please cite this article as: A. Romero, J. González, M.J. Deen, J.A. Jiménez-Tejada, Versatile model for the contact region of organic thin-film transistors, Organic Electronics, (2020), 77, 105523.Contact effects in organic thin film transistors (OTFTs) remain an important problem to be solved in these devices. Therefore, the correct physio-chemical modeling of the contact regions in OTFTs is necessary. In this work, a standard model for the contact region of OTFTs is proposed. It is a versatile model that describes the current-voltage characteristics of different kinds of contacts. It reproduces the behavior of Schottky barrier or space-charge limited contacts. It is a simple unified model since only a single parameter is necessary in order to distinguish between both kinds of contacts. The model is easily integrated in a generic compact model for the current-voltage characteristics of OTFTs. The resulting compact model, used in combination with an evolutionary parameter extraction procedure, allows to extract the intrinsic parameters and the current-voltage curves at the contact of single short-channel transistors. There is no need to use transistors with multiple channel lengths to accurately characterize the contact region or the active channel of the transistor. The model is tested with published experimental data of OTFTs with Schottky barrier or space-charge limited contacts. Finally, the method has been used as a diagnostic tool to analyze how an ammonia sensor reacts to different concentrations of the ammonia gas. Interestingly, alterations in the contact region have been detected when the gas concentration varies, transforming the space-charge limited contact of a pristine OTFT into a Schottky barrier contact under the exposure of gas.This work was supported by projects MAT2016-76892-C3-3-R, TIN2015-67020-P and PGC2018-098813-B-C31 funded by the Spanish Government and “European Regional Development Funds (ERDF)”. This work was also supported by NSERC Green Electronics Network (GreEN), Grant Number NETGP 508526–17

Evolutionary parameter extraction for an organic TFT compact model including contact effects

Please cite this article as: A. Romero, J. González, R. Picos, M. J. Deen, J. A. Jiménez-Tejada, Evolutionary parameter extraction for an organic TFT compact model including contact effects, Organic Electronics, (2018), 61, 242-253. © 2018. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/ Digital Object Identifier: 10.1016/j.orgel.2018.05.062 Source: https://www.sciencedirect.com/science/article/pii/S1566119918302908Parameter extraction is a complex procedure when contact effects are present. In this work, a multi-objective evolutionary parameter extraction procedure is used to simultaneously determine the parameters of both a compact model for the current-voltage characteristics of organic thin-film transistors and a contact model. This procedure can be used to overcome shortcomings of previous parameter extraction procedures. The proposed evolutionary procedure can be used in those situations whereby the parameter set extracted by other procedures does not comply its physical meaning, or if a poor agreement between the experimental data and the analytical results exists. In the last case, the evolutionary procedure can be used as a problem optimization method. After the evolutionary parameter extraction procedure is applied to the transistor output characteristics, the obtained results show an excellent agreement with the experimental data.This work was supported by projects TIN2015-67020-P, MAT2016-76892-C3-3-R, TEC2014-56244-R, and Excellence Networks REFLEXIO and NANOVAR funded by the Spanish “Ministerio de Economía y Competitividad” and European Regional Development Funds (ERDF)

Device Physics of Hybrid Perovskite Solar cells: Theory and Experiment

Perovskite solar cells (PSCs) exhibit a series of distinctive features in their optoelectronic response which have a crucial influence on the performance, particularly for long-time response. Here, a survey of recent advances both in device simulation and optoelectronic and photovoltaic responses is provided, with the aim of comprehensively covering recent advances. Device simulations are included with clarifying discussions about the implications of classical drift-diffusion modeling and the inclusion of ionic charged layers near the outer carrier selective contacts. The outcomes of several transient techniques are summarized, along with the discussion of impedance and capacitive responses upon variation of bias voltage and irradiance level. In relation to the capacitive response, a discussion on the J-V curve hysteresis is also included. Although alternative models and explanations are included in the discussion, the review relies upon a key mechanism able to yield most of the rich experimental responses. Particularly for state-of-the-art solar cells exhibiting efficiencies around or exceeding 20%, outer interfaces play a determining role on the PSC's performance. The ionic and electronic kinetics in the vicinity of the interfaces, coupled to surface recombination and carrier extraction mechanisms, should be carefully explored to progress further in performance enhancement